Display Flicker and Its Countermeasures in LCD Technology
A comprehensive analysis of flicker causes, including lcd screen retention, and advanced solutions in thin-film transistor liquid crystal displays.
5.2.2.1 Pixel Voltage Changes Caused by Gate Voltage Variations
The equivalent circuit of the TFT section and pixel section is shown in Figure 5-19. In this circuit, the parasitic capacitances C, C, and Cas exist in the TFT section outlined by the dashed line. During the non-selection period, ideally, the pixel electrode should be electrically isolated. However, due to the presence of these parasitic capacitances shown in Figure 5-19, even the electrically isolated pixel electrode can be affected by other electrodes through these parasitic capacitances. This phenomenon can significantly impact lcd screen retention when not properly addressed.
In particular, when the gate voltage changes significantly, this influence cannot be ignored. Let's assume the gate voltage changes from ON to OFF (for example, +15V to 0V). The resulting voltage change ΔV in the pixel electrode (referred to as the impact voltage) is determined by the voltage division ratio between the gate-drain parasitic capacitance C and the sum of the pixel capacitance Cₚ, the storage capacitance Cₛₜ, which directly affects lcd screen retention:
Where: V_GON is the gate voltage ON level; V_GOFF is the gate voltage OFF level; C_gd is the gate-drain parasitic capacitance; Cₚ is the pixel capacitance (liquid crystal layer capacitance); Cₛₜ is the storage capacitance.
Figure 5-19: Equivalent Circuit of TFT and Pixel Sections
Note: Regarding the definition of source and drain electrodes, please refer to the note in Figure 5-8 and related diagrams on page 178. Capacitance refers to the magnitude of electrical capacity, while capacitor refers to the component itself.
The impact voltage ΔVₚ (Figure 5-20) occurs during both positive and negative polarity frame periods. Applying a DC voltage to the liquid crystal layer can shorten the liquid crystal life and cause画质 degradation phenomena such as "flicker" and lcd screen retention. Therefore, it is necessary to eliminate this impact voltage ΔVₚ. This can be achieved by shifting the common voltage ΔVcom (Figure 5-20), which helps mitigate lcd screen retention issues.
Figure 5-20: TFT LCD Driving Waveforms (Inverted Common DC Driving Method)
Voltage centers of each signal, common voltage, frame period, black level, data signal waveform ΔV, white level, pixel electrode waveform, address signal waveform, power supply side, and terminal side.
The relationship between these voltage fluctuations and their timing is critical for understanding both flicker and lcd screen retention. When the common voltage is properly adjusted to compensate for the impact voltage, it creates a more stable display environment that resists both temporary flicker and long-term lcd screen retention issues. This compensation mechanism works by ensuring that the net voltage across the liquid crystal layer remains consistent over time, preventing the buildup of charge that contributes to lcd screen retention.
5.2.2.2 Voltage Changes Caused by Liquid Crystal Layer Capacitance Variations
The capacitance of the liquid crystal layer changes depending on whether the pixel is in the ON or OFF state. Consequently, the impact voltage ΔVₚ is significantly affected by Cₚ. The variation portion d(ΔVₚ) of the impact voltage corresponding to the change in Cₚ is given by the following equation, which is critical for understanding lcd screen retention:
Where: ΔVₚmax is the maximum change in impact voltage ΔVₚ when displaying white; ΔVₚmin is the minimum change in impact voltage ΔVₚ when displaying black; Cₚmax is the pixel capacitance when displaying black; Cₚmin is the pixel capacitance when displaying white.
This variation portion d(ΔVₚ) of the impact voltage corresponding to changes in Cₚ, even if eliminated by shifting the common voltage Vcom as described above, still leaves a DC voltage component. This residual voltage variation d(ΔVₚ) can still cause "flicker" and "afterimages" (lcd screen retention) that degrade display quality. These issues are particularly problematic in applications requiring high-quality displays where lcd screen retention would be immediately noticeable to users.
The main causes of such display quality degradation, including lcd screen retention, are as follows:
- Voltage impact phenomena caused by parasitic capacitances in the TFT, and pixel voltage changes caused by variations in the liquid crystal layer capacitance. This is the primary cause of both flicker and lcd screen retention.
- Insufficient TFT ON current resulting in different write voltages for positive and negative polarities, leading to asymmetry in voltages applied to the liquid crystal layer between odd and even frames. This asymmetry is a significant contributor to lcd screen retention.
- Asymmetry in retention characteristics caused by TFT leakage current in the non-selected state, which exacerbates lcd screen retention.
- Asymmetry caused by offset voltages between liquid crystal cells, which can create persistent voltage differentials contributing to lcd screen retention.
Each of these factors contributes differently to overall display quality issues. The first factor, related to capacitance variations, creates a fundamental challenge because it's inherent to the liquid crystal material properties. As the liquid crystal molecules align differently based on applied voltage, their dielectric properties change, affecting capacitance. This unavoidable physical phenomenon means that lcd screen retention cannot be completely eliminated through material selection alone but must be managed through intelligent design and driving techniques.
The second factor, insufficient ON current, highlights the importance of TFT design in preventing lcd screen retention. When the TFT cannot supply adequate current during the write phase, the voltage across the liquid crystal may not reach its intended level, especially when alternating between polarities. This inconsistency leads to charge accumulation over time, directly causing lcd screen retention. Manufacturers must carefully balance TFT size, material properties, and driving voltages to ensure sufficient current without increasing power consumption or reducing aperture ratio.
5.2.2.3 Countermeasures for Overcoming Display Quality Degradation
As previously discussed, to address display quality degradation caused by pixel voltage changes, including lcd screen retention, it is necessary to increase the storage capacitance Cₛₜ and reduce parasitic capacitances C_gd, C_gs, and C_gate, among others, through TFT structural design improvements. However, solely relying on TFT structural measures often leads to issues such as reduced aperture ratio. Therefore, implementing countermeasures in the driving method is also a viable solution for reducing lcd screen retention.
Regarding these driving methods, as mentioned earlier, the primary measure is to alternate the polarity of driving voltages for adjacent pixels (polarity inversion). This technique works by spatially averaging the optical response ripples, eliminating low-frequency components that contribute to flicker and lcd screen retention. Table 5-2 lists various polarity inversion methods and their effectiveness in reducing lcd screen retention.
Table 5-2: Polarity Inversion Methods for Reducing LCD Screen Retention
| Method | Description | Effectiveness Against Flicker | Effectiveness Against LCD Screen Retention | Implementation Complexity |
|---|---|---|---|---|
| Frame Inversion | Inverts polarity of all pixels every frame | Moderate | Low | Low |
| Line Inversion | Alternates polarity for each horizontal line | Good | Moderate | Moderate |
| Column Inversion | Alternates polarity for each vertical column | Good | Moderate | Moderate |
| Dot Inversion | Alternates polarity for adjacent pixels | Excellent | Good | High |
| H/V Line Inversion | Combines horizontal and vertical inversion | Excellent | Excellent | High |
Among these driving methods, the H/V line inversion method currently appears to be the most effective for improving display quality and reducing lcd screen retention. This method combines horizontal and vertical inversion patterns to create a checkerboard-like polarity arrangement that minimizes both flicker and lcd screen retention by ensuring that no adjacent pixels maintain the same polarity for extended periods.
Incidentally, to increase the storage capacitance Cₛₜ without reducing the aperture ratio, it's possible to eliminate the independent Cₛₜ (Con com) [see Figure 5-21(a)] and instead adopt a "Cₛₜ on gate" configuration where Cₛₜ overlaps with the TFT gate, as shown in Figure 5-21(b). This arrangement significantly improves space utilization while maintaining or increasing capacitance, which helps reduce lcd screen retention.
Figure 5-21: Storage Capacitance Configurations
Figure 5-21(a): Independent Cₛₜ Configuration
Figure 5-21(b): Cₛₜ on Gate Configuration
The problem with this "Cₛₜ on gate" technology is that the load capacitance of the gate line increases, which can cause waveform distortion on the gate line. This distortion can lead to timing inconsistencies in pixel addressing, potentially introducing new sources of flicker and lcd screen retention if not properly managed. Therefore, finding ways to reduce gate line resistance becomes essential when implementing this approach to maintain display quality and minimize lcd screen retention.
Reducing gate line resistance can be achieved through several methods, each with its own trade-offs. One approach is to use thicker metal lines for the gate conductors, which directly reduces resistance but may increase manufacturing complexity and cost. Another method involves using materials with higher conductivity, such as copper instead of the more common aluminum alloys, though this can introduce challenges with adhesion and corrosion resistance.
Additionally, optimizing the layout of the gate lines to minimize their length or using multi-level metallization can help reduce resistance-induced delays. These measures ensure that the gate signals reach all pixels in a timely manner, maintaining consistent charging and discharging of the liquid crystal capacitors across the display. This consistency is crucial for preventing both flicker and lcd screen retention, as uneven charging times would create voltage differentials that persist across frames.
Another important consideration in combating lcd screen retention is the implementation of periodic refresh cycles or "cleaning" frames. These specialized frames apply voltages designed to neutralize any residual charge that may have accumulated in the liquid crystal layer, effectively resetting the display state. When combined with the polarity inversion techniques mentioned earlier, these cleaning cycles can significantly reduce lcd screen retention in applications where static images are displayed for extended periods.
Temperature management also plays a role in mitigating lcd screen retention. Liquid crystal materials exhibit temperature-dependent properties, including changes in capacitance and response time. As temperature increases, the liquid crystal molecules become more mobile, which can accelerate charge redistribution and reduce lcd screen retention. Conversely, at lower temperatures, the molecules are less mobile, making lcd screen retention more pronounced. Implementing thermal management systems, such as localized heating elements or thermal spreaders, can help maintain optimal operating temperatures and reduce temperature-related lcd screen retention variations.
Material advancements continue to play a crucial role in reducing lcd screen retention. New liquid crystal formulations with lower viscosity and faster response times allow for more complete charge neutralization during polarity inversions. Additionally, improved alignment layers and electrode materials can reduce surface interactions that trap charge, one of the primary mechanisms behind persistent lcd screen retention. These material improvements, combined with advanced driving techniques, have led to significant reductions in lcd screen retention in modern LCD displays.
In summary, addressing display flicker and lcd screen retention requires a multi-faceted approach combining:
- Optimized TFT design to minimize parasitic capacitances
- Innovative storage capacitance configurations that balance performance and aperture ratio
- Advanced driving techniques, particularly H/V line inversion, to manage polarity and reduce low-frequency components
- Material improvements to enhance charge mobility and reduce trapping
- Thermal management to maintain consistent operating conditions
- Specialized refresh cycles to neutralize residual charges contributing to lcd screen retention
By integrating these strategies, display manufacturers can significantly reduce both flicker and lcd screen retention, resulting in higher quality displays with improved viewing experiences and longer lifetimes. As display technologies continue to advance, further innovations in these areas will likely lead to even more effective solutions for combating lcd screen retention and other display artifacts.